Recently, studies on multi-level memory for storing multi-bit data in a single memory cell have been actively carried on in order to increase the density of integration for memory. A memory cell in the multi-level memory is capable of storing multiple bits. Such memory cell storing multiple bits is referred to as a multi-level cell (MLC) while a memory cell storing a single bit is referred to as a single-level cell (SLC). Since the MLC stores at least two bits, it has at least three data storage states (or cell states or states) and at least three threshold voltage distributions respectively corresponding to the states.
The threshold voltage distribution of an MLC may changes over time due to coupling with an adjacent cell, charge loss, and so on.